Electronic devices generate heat in operation and, in most cases, the devices are temperature sensitive. The temperature at which the device chip operates and the ability to remove heat from the chip may, in fact, determine or limit various operating characteristics of the circuit. Thus, means is often provided for conducting heat from the package to an external sink. In simple plastic-encapsulated devices, the heat may be adequately removed by the leads. The encapsulating plastic, however, is not a particularly effective heat transfer medium. Accordingly, as the density of device functions increases, the need for effective heat dissipation increases. Where the device chip is encapsulated in the plastic, removal of thermal energy is difficult.
Advances in microelectronics technology tend to develop device chips which occupy less physical space while performing more functions. Conventionally, the chips are packaged for use in housings which protect the chip from its environment and provide means for input/output communications between the chip and external circuitry. The continuing drive toward miniaturization thus results in generation of more heat in less physical space with less structure for removing heat from the package. Similarly, the development of electronic circuit device chips using compound semiconductors further expands the requirements for packaging which can contain devices operating at higher temperatures and control device temperatures by heat dissipation.
Miniaturization of chips has also led to encapsulation of more than one chip body within a single package housing. The chips may be supported on one or both sides of a substrate or rerouting board and may even be assembled in stacked arrangements. For purposes of this disclosure, the terms "chip", "die" and "circuit device" and the like are used interchangeably and are intended to cover all electronic circuit device configurations enclosed within a single housing or package, regardless of whether such device configuration is in the form of one or more pieces of semiconductor material and/or supporting interconnection structure.
Conventionally, high pin-count packages are generally either ceramic packages or plastic packages. Ceramic packages are better heat conductors than plastics, provide hermetic sealing and are thus generally considered more reliable. However, ceramic packaging is relatively expensive. Transfer and injection molded plastic packaging is much less expensive and is therefore widely used when the advantages of hermetic sealing are not essential.
Ceramic and glass packages can provide a gas-filled or evacuated (both herein referred to as gas-filled) cavity surrounding the circuit chip because hermetic sealing of the cavity can be achieved. In most plastic packages, the chip and electrical interconnections between the chip and the lead frame are all encapsulated in the plastic material. The plastic material, however, has a higher dielectric coefficient than air, resulting in reduced frequency transmission signals through the interconnections encapsulated in plastic.
Miniaturization of the device package has also led to significant problems in mounting the package on support media such as circuit boards or the like. As package sizes decrease and the number of input/output leads increases, the size of the individual leads and the spacing between leads must be reduced, leading to difficulties in precisely and accurately positioning and securing the leads on mounting pads on the surface of the circuit board. Such miniaturized leads are also extremely fragile, thus requiring means for protecting the package leads during fabrication, testing, transport and assembly on the board.
In an attempt to increase the number of input/output leads without reducing physical spacing therebetween, packages have been developed in which the leads project from one face of the package in an interconnection array. Typically, packages using this arrangement have a number of pins extending in an interconnection array pattern from the lower surface and are referred to as pin grid array (PGA) packages. Such packages have the distinct advantage of using the surface area of the circuit board immediately below the package for interconnections, thus permitting higher package density on the board, but are usually made using ceramic packaging techniques. Although quite effective as a mounting technique, PGA packages are usually quite expensive and must be mounted on a socket or other means to adapt the PGA to the circuit board such as by forming a grid pattern of mounting holes in the circuit board.
More direct mounting to the surface of a circuit board can be accomplished by replacing the pins of a PGA with solderable mounting pads or lands arranged on the lower surface of the package. Such land grid array or solderable grid array (SGA) packages can be more easily attached directly to appropriately arranged mounting pads on the surface of a circuit board or the like. Direct surface mounting using SGA packaging techniques not only eliminates use of fragile and flexible interconnection leads, it dramatically reduces total lead length from chip to interconnection; reduces overall package size; eliminates need for in-transit lead protection such as the commonly-used lead bumpers on quad flatpack packages; permits interconnection grid array patterns with more space between interconnection points; and generally provides easier and more reliable surface mount interconnections. Unfortunately, such SGA packages are typically ceramic packages and thus quite expensive.
More recently, plastic packaging techniques have been employed to produce an encapsulation package in which the chip is mounted on one side of a miniature circuit board with interconnection leads routed through the miniature board and terminating in an interconnection array of lands or the like on the bottom of the miniature board. Solder balls are formed on the lands or ends of the leads and the device is encapsulated in plastic on the opposite side of the miniature circuit board. This package is usually referred to as a solder ball grid array (SBGA) package and provides many of the size and interconnection advantages of SGA packages at lower costs. The typical SBGA package, however, is a composite of encapsulation materials and circuit board technology and thus is difficult to form; does not provide adequate sealing and chip protection; and is somewhat limited in applicability.
Attempts to provide bottom surface input/output terminals in molded plastic packages (such as disclosed in U.S. Pat. No. 5,157,480 to McShane, et al.) have generally been limited to providing duplicate terminal arrangements for testing and mounting and therefore require uniquely designed and fabricated lead frame assemblies and molding techniques. Such arrangements are of little utility in commercial devices and, because of their unique requirements, provide none of the desired advantages.
In accordance with the present invention, conventional lead frame assemblies and conventional plastic packaging techniques are utilized to form plastic packages with input/output terminals terminating in a solder grid array or solder ball grid array on the bottom surface of the package. Since conventional lead frame assemblies are used, the assembly process steps for mounting a die on the die pad, etc., may be identical to conventional processing. The lead frame is modified by trimming prior to encapsulation to shorten the input/output leads and arrange their outer ends in an interconnection array pattern parallel and substantially coplanar with or extending slightly lower than the bottom surface of the package to be formed. The modified lead frame assembly is then encapsulated using conventional techniques to form a plastic package with input/output terminals arranged in an interconnection array on its lower surface. By modifying conventional lead frame assemblies and using conventional assembly and plastic packaging techniques, the package of the invention can be formed effectively as inexpensively as standard plastic packages yet provide all the advantages of SGA or SBGA packages. The invention may also be used to form packages with air-filled cavities for high frequency electronic circuit devices and heat sinks for devices which generate excessive amounts of heat. Other features and advantages of the invention will become more readily understood from the following detailed description taken in connection with the appended claims and attached drawing in which: